Display device and related manufacturing method

ABSTRACT

A display device may include a substrate, a plurality of gate lines and a plurality of data lines, gate wirings and data wirings. The substrate may comprise a display area in which a plurality of pixels for displaying an image are arranged and a non-display area around the display area. The plurality of gate lines and the plurality of data lines in the display area on the substrate, the plurality of gate lines extending in one direction and the plurality of data lines extending in a direction intersecting said one direction. The gate wirings and data wirings in the non-display area on the substrate. At least one of the gate wirings and the data wirings has a hole having an edge in the form of numbers.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2016-0135881, filed on Oct. 19, 2016, in the Korean Intellectual Property Office (KIPO); the disclosure of the Korean Patent Application is incorporated by reference herein in its entirety.

BACKGROUND 1. Technical Field

The technical field relates to a display device, and more particularly, to a display device including a narrow bezel.

2. Discussion of Related Art

Display devices may include liquid crystal display (LCD) devices, organic light emitting diode (OLED) display devices, plasma display panel (PDP) devices, and electrophoretic display devices.

A display device may include a display area in which a plurality of pixels for displaying an image are arranged and may include a non-display area around the display area. The non-display area may include wirings and/or drivers. In addition, the non-display area may include a space for displaying line numbers of gate lines and data lines in order to identify defects that may occur during the process of manufacturing the display device and to perform repairing.

This background section is intended to provide useful information for understanding technology related to this application. The background section may include ideas, concepts, and/or information that are not known or appreciated by those skilled in the pertinent art prior to an effective filing date of this application.

SUMMARY

Embodiments may be directed to a display device including a narrow bezel.

According to an embodiment, a display device may include the following elements: a substrate comprising a display area in which a plurality of pixels for displaying an image are arranged and a non-display area abutting the display area; a plurality of gate lines and a plurality of data lines in the display area on the substrate, the plurality of gate lines extending in one direction and the plurality of data lines extending in a direction intersecting said one direction; and gate wirings and data wirings in the non-display area on the substrate. At least one of the gate wirings and the data wirings has a hole having an edge in the form representing multiple numbers.

At least one of the gate wirings and the data wirings has a hole having an edge in the form representing symbols, letters and patterns.

The gate wiring may be formed in a substantially same process as a process in which the gate line is formed.

The data wiring may be formed in a substantially same process as a process in which the data line is formed.

The numbers represent an identification line number of the gate line and the data line.

The symbol, the letter and the pattern may represent an identification line number of the gate line and the data line.

The symbol, the letter and the pattern represent an ascending direction or a descending direction of an identification line number of the gates line and the data lines.

The gate wiring may be a part of one of a driving signal wiring, a power application wiring, an antistatic wiring, an inspection wiring and a repair wiring.

The data wiring may be a part of one of a driving signal wiring, a power application wiring, an antistatic wiring, an inspection wiring and a repair wiring.

The gate wiring may include a gate fan-out wiring connected to the gate line.

The hole may be positioned adjacent to the gate fan-out wiring.

The data wiring may include a data fan-out wiring connected to the data line.

The hole may be positioned adjacent to the data fan-out wiring.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plan view schematically illustrating a conventional display device.

FIG. 2 is a partial enlarged view illustrating an area “A” of FIG. 1.

FIG. 3 is a partial enlarged view illustrating an area “B” of FIG. 1.

FIG. 4 is a plan view schematically illustrating a display device according to an embodiment.

FIG. 5 is a partial enlarged view illustrating an area “C” of FIG. 4 according to an embodiment.

FIG. 6 is a plan view illustrating a gate wiring of FIG. 5 according to an embodiment.

FIG. 7 is a plan view illustrating a non-display area according to an embodiment.

FIG. 8 is a plan view illustrating a data wiring of FIG. 7 according to an embodiment.

FIG. 9 is a partial enlarged view illustrating an area “D” of FIG. 4 according to an embodiment.

FIG. 10 is a plan view illustrating a data wiring of FIG. 9 according to an embodiment.

FIG. 11 is a plan view illustrating a non-display area according to an embodiment.

FIG. 12 is a plan view illustrating a gate wiring of FIG. 11 according to an embodiment.

DETAILED DESCRIPTION

Embodiments are described with reference to the accompanying drawings. Practical embodiments are not limited to the described embodiments. Practical embodiments include all practical changes, equivalents, and substitutions to the described embodiments.

In the drawings, thicknesses layers and areas are illustrated in an enlarged manner for clarity and ease of description.

When a layer, area, or plate is referred to as being “on” another layer, area, or plate, it may be directly on the other layer, area, or plate, or intervening layers, areas, or plates may be present therebetween. Conversely, when a layer, area, or plate is referred to as being “directly on” another layer, area, or plate, intervening layers, areas, or plates may be absent therebetween. The spatially relative terms “below”, “beneath”, “lower”, “above”, “upper” and the like, may be used herein for ease of description to describe the relations between one element and another element as illustrated in the drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the drawings. For example, in the case where a device illustrated in the drawing is turned over, a first element positioned “below” or “beneath” a second element may be placed “above” the second element. Accordingly, the illustrative term “below” may include both the lower and upper positions. The device may also be oriented in the other direction and thus the spatially relative terms may be interpreted differently depending on the orientations.

The term “connect” may mean “directly connect”, “indirectly connect”, and/or “electrically connect”. The terms “comprises,” “including,” “includes” and/or “including,” may specify the presence of stated features, integers, steps, operations, elements, and/or components, but may not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups. The term “conductive” may mean “electrically conductive”.

“About” or “approximately” is inclusive of the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, considering the measurement in question and the error associated with measurement of the particular quantity (i.e., the limitations of the measurement system). For example, “about” may mean within one or more standard deviations, or within ±30%, 20%, 10%, 5% of the stated value.

Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the art to which this application pertains. Terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an ideal or excessively formal sense unless clearly defined in the present specification.

Like reference numerals may refer to like elements.

A display device according to one or more embodiments may be, for example, an LCD device, an OLED display device, or a plasma display device.

FIG. 1 is a plan view schematically illustrating a conventional display device, FIG. 2 is a partial enlarged view illustrating an area “A” of FIG. 1, and FIG. 3 is a partial enlarged view illustrating an area “B” of FIG. 1.

Referring to FIGS. 1, 2, and 3, a conventional display device 10 may include a substrate 11, the substrate 11 including a display area DA in which a plurality of pixels PX for displaying an image are arranged and a non-display area NDA around the display area DA; a plurality of gate lines GL and a plurality of data lines DL in the display area DA on the substrate 11, the plurality of gate lines GL extending in one direction and the plurality of data lines DL extending in a direction intersecting said one direction; and a plurality of gate driver integrated circuits (“ICs”) 20 and a plurality of data driver ICs 30 in the non-display area NDA on the substrate 11.

In addition, in the conventional display device 10, various wirings such as an antistatic circuit wiring, a repair wiring and an inspection circuit wiring, as well as a driving signal wiring and a power application wiring for driving pixels, may be integrated in the non-display area NDA on the substrate 11.

FIG. 2 is a view illustrating a portion of the non-display area NDA in which the data driver IC 30 is disposed in the display device 10 of FIG. 1, and FIG. 3 is a view illustrating a portion of the non-display area NDA of the display device 10 in which the gate driver IC 20 is disposed.

Referring to FIG. 2, the conventional display device 10 may include antistatic circuit units 12 and 13, a data line number indicating portion 14, a repair wiring 15, a data fan-out wiring DF, and the like in an upper portion of the non-display area NDA.

In addition, referring to FIG. 3, the conventional display device 10 may include a gate fan-out wiring GF connected to the gate line GL, a gate line number indicating portion 16, a common voltage wiring VCOML, and the like in left and right portions of the non-display area NDA.

Referring to FIGS. 2 and 3, the conventional display device 10 may include areas 14 and 16 in the non-display area NDA at which line numbers of the gate line GL and the data line DL are indicated in order to check for defects that may occur during the process of manufacturing the display device 10 and to proceed with repairing.

For a UHD (ultra-high-definition) class display device, a horizontal resolution is 3,840, and thus a minimum of five digits from 1 to 11,520 is required to indicate the data line numbers. Considering the resolution of the conventional exposure apparatus, widths D1 and D2 of at least about 100 μm is required for displaying the five-digit numbers.

FIG. 4 is a plan view schematically illustrating a display device according to an embodiment, FIG. 5 is a partial enlarged view illustrating an area “C” of FIG. 4 according to an embodiment, and FIG. 6 is a plan view illustrating a gate wiring of FIG. 5 according to an embodiment.

Referring to FIGS. 4, 5, and 6, a display device 100 may include a substrate 110, the substrate 110 including a display area DA in which a plurality of pixels PX for displaying an image are arranged and a non-display area NDA around the display area DA; a plurality of gate lines GL and a plurality of data lines DL in the display area DA on the substrate 11, the plurality of gate lines GL extending in one direction and being electrically connected to the pixels PX, and the plurality of data lines DL extending in a direction intersecting said one direction and being electrically connected to the pixels PX; and a plurality of gate driver ICs 200 and a plurality of data driver ICs 300 in the non-display area NDA on the substrate 110.

In addition, in the display device 100, various wirings such as an antistatic circuit wiring, a repair wiring and an inspection circuit wiring, as well as a driving signal wiring and a power application wiring for driving pixels, may be integrated in the non-display area NDA on the substrate 110.

FIG. 5 is a view illustrating a portion of the non-display area NDA in which the data driver IC 300 is disposed in the display device 100 of FIG. 4. Referring to FIG. 5, the display device 100 may include antistatic circuit units 112 and 113, a repair wiring 115, a data fan-out wiring DF, and the like in an upper portion of the non-display area NDA.

The antistatic circuit units 112 and 113 and the repair wiring 115 may be formed by combination of a gate wiring (formed in the non-display area NDA in a substantially same process as a process in which the gate line GL is formed) and a data wiring (formed in the non-display area NDA in a substantially same process as a process in which the data line DL is formed).

The data lines DL in the display area DA may be connected to the antistatic circuit units 112 and 113 in the non-display area NDA.

The antistatic circuit units 112 and 113 may be positioned between the data driver IC 300 and the data lines DL and may substantially protect the pixels PX from static electricity flowing to the data lines DL during driving of the display device 100 or in the process of manufacturing the display device 100.

The antistatic circuit units 112 and 113 may include an electrostatic transistor unit 112 and an electrostatic diode unit 113. The electrostatic diode unit 113 may disperse current flowing into the data lines DL, and the electrostatic transistor unit 112 may store the remaining static electricity in each of the data lines DL and may be broken instead of a driving thin film transistor (TFT) in the display area DA.

The electrostatic transistor unit 112 may be a small TFT, e.g., a “tick” TFT. The electrostatic transistor unit 112 may receive a gate voltage from at least one of power apply lines or signal lines in the non-display area NDA to be turned off.

The repair wiring 115 is a wiring for short-circuiting a data line if a failure occurs in the process of manufacturing the display device 100. In case defects occur in the process, a laser beam may be irradiated to connect a suitable portion of the repair wiring 115 to a defective data line DL.

The data fan-out wiring DF may connect the data driver IC 300 with the data lines DL. The data fan-out wiring DF may be formed in a zigzag shape to substantially prevent an RC delay deviation depending on the length between the respective data lines DL and the data driver IC 300.

It is depicted in FIG. 5 that the antistatic circuit units 112 and 113, the repair wiring 115, and the data fan-out wiring DF are disposed in the upper portion of the non-display area NDA in the display device 100. In embodiments, various wirings for driving the display device 100, such as a driving signal wiring, a power application wiring, and an inspection circuit wiring, may be integrated in the upper portion of the non-display area NDA in the display device 100.

In this application, among the various wirings arranged in the non-display area NDA, a wiring formed in substantially the same process and of substantially the same material(s) as the gate lines GL is referred to as a gate wiring, and a wiring formed in substantially the same process and of substantially the same material(s) as the data lines DL is referred to as a data wiring.

In the display device 100, at least one of the gate wiring and the data wiring arranged in the non-display area NDA may have a hole having (one or more edges forming) at least one of a numerical shape (or numeral shape representing numbers), a symbol shape, a letter shape, and a pattern shape.

In the display device 100, at least one of the gate wiring and the data wiring in the non-display area NDA may have a number/numeral, a symbol, a letter, and/or a pattern in an engraved form. The letter and the pattern may include bar codes, QR codes, and the like.

The gate wiring and/or the data wiring may have multiple holes having forms representing multiple numbers, symbols, letters, and/or patterns. The numbers, symbols, letters, and/or patterns may display various information related to the display device 100. For example, gate line identification numbers, data line identification number, and/or an ascending or descending direction of the gate line identification numbers and/or the data line identification numbers may be displayed and/or indicated. The ascending/increasing direction or the descending/decreasing direction of the gate line identification numbers and/or the data line identification numbers may be represented by an arrow-shaped symbol or the like.

Referring to FIGS. 5 and 6, in the display device 100, the plurality of gate wirings constituting the electrostatic transistor unit 112, among the various wirings arranged in the non-display area NDA, may have a hole 112 h having an edge in the form representing a number and/or symbol. In embodiments, the gate wiring constituting the electrostatic diode unit 113 or the repair wiring 115 may have a hole having an edge that has a numerical shape.

Numbers, symbols, letters, and patterns represented by the holes 112 h may be arranged in parallel with an adjacent one of the data lines DL to indicate the corresponding data line identification number. Advantageously, if a defect occurs in a data line DL in the process of manufacturing the display device 100, the repair process may be easily performed using the corresponding line identification number.

Since the data line identification numbers are displayed using the gate wiring of the electrostatic transistor unit 112 which is a conventional structure, no additional space for displaying the data line identification numbers may be necessary. Advantageously, the width of the non-display area NDA may be minimized, and/or the width of various wirings arranged in the non-display area NDA may be maximized in the display device 100.

FIG. 7 is a plan view illustrating a non-display area NDA according to an embodiment, and FIG. 8 is a plan view illustrating a data wiring of FIG. 7.

Referring to FIGS. 7 and 8, in a display device 100, a data wiring constituting a repair wiring 115, among various wirings arranged in a non-display area NDA, may have a hole 115 h having an edge in the form representing a number and/or symbol. In embodiments, the data wiring constituting the electrostatic transistor unit 112 or the electrostatic diode unit 113 may have a hole having an edge that has a numerical shape.

Numbers, symbols, letters, and patterns represented by the holes 115 h may indicate one or more corresponding data line identification numbers. Advantageously, if a defect occurs in a data line DL, the repair process may be easily performed using the corresponding line identification number.

Since the data line numbers is displayed using the data wiring of the repair wiring 115 which is a conventional structure, no additional space for displaying the data line numbers may be required. Advantageously, the width of the non-display area NDA may be minimized and/or the width of various wirings arranged in the non-display area NDA may be maximized in the display device 100.

FIG. 9 is a partial enlarged view illustrating an area “D” of FIG. 4, and FIG. 10 is a plan view only illustrating a data wiring of FIG. 9.

Referring to FIGS. 9 and 10, a display device 100 may include a gate fan-out wiring GF, a common voltage wiring VCOML, and the like in left and right portions of a non-display area NDA. In embodiments, various wirings for driving the display device 100, such as a driving signal wiring and a power application wiring, may be integrated in the left and right portions of the non-display area NDA in the display device 100.

In the display device 100, the common voltage wiring VCOML, among various wirings arranged in the non-display area NDA, may have a hole 160 h having an edge in the form representing a number and/or symbol.

Numbers, symbols, letters, and patterns represented by the holes 160 h may be arranged in parallel with an adjacent one of the gate lines GL to indicate the corresponding gate line identification number. Advantageously, if a defect occurs in a gate line GL, the repair process may be easily performed using the corresponding line identification number.

Since the gate line number is displayed using the common voltage wiring VCOML which is a conventional structure, no additional space for displaying the gate line number may be required. Advantageously, the width of the non-display area NDA may be minimized and/or the width of various wirings arranged in the non-display area NDA may be maximized in the display device 100.

FIG. 11 is a plan view illustrating a non-display area according to an embodiment, and FIG. 12 is a plan view illustrating a gate wiring of FIG. 11.

Referring to FIGS. 11 and 12, in a display device 100, a gate line GL, among various wirings in a non-display area NDA, may have a hole 170 h having an edge in the form representing numbers and symbols.

Numbers, symbols, letters, and patterns represented by the holes 170 h may indicate corresponding gate line identification numbers. Advantageously, if a defect occurs in a gate line GL, the repair process may be easily performed using the corresponding line identification number.

Since the gate line number is displayed at the gate line GL per se, no additional space for displaying the gate line number may be necessary. Advantageously, the width of the non-display area NDA may be minimized and/or the width of various wirings arranged in the non-display area NDA may be maximized in the display device 100.

As set forth hereinabove, according to one or more embodiments, space for displaying the line identification numbers of the gate lines and the data lines may be saved by indicating the line identification numbers of the gate lines and the data lines in an engraved form on various wirings in the non-display area of the display device.

Advantageously, it is possible to minimize the width of the non-display area in the display device and/or to maximize the width of the various wirings in the non-display area.

While example embodiments have been illustrated and described, various changes in form and detail may be implemented without departing from the spirit and scope defined by the claims. 

What is claimed is:
 1. A display device comprising: a substrate comprising a display area in which a plurality of pixels for displaying an image are arranged and a non-display area abutting the display area; a plurality of gate lines and a plurality of data lines in the display area on the substrate, the plurality of gate lines extending in one direction and the plurality of data lines extending in a direction intersecting said one direction; and gate wirings and data wirings in the non-display area on the substrate, wherein at least one of the gate wirings and the data wirings has a hole having an edge in the form representing multiple numbers.
 2. The display device of claim 1, wherein at least one of the gate wirings and the data wirings has a hole having an edge in the form representing symbols, letters and patterns.
 3. The display device of claim 1, wherein the gate wiring is formed in a substantially same process as a process in which the gate line is formed.
 4. The display device of claim 1, wherein the data wiring is formed in a substantially same process as a process in which the data line is formed.
 5. The display device of claim 1, wherein the numbers represent an identification line number of the gate line and the data line.
 6. The display device of claim 2, wherein the symbol, the letter and the pattern represent an identification line number of the gate line and the data line.
 7. The display device of claim 2, wherein the symbol, the letter and the pattern represent an ascending direction or a descending direction of an identification line number of the gates line and the data lines.
 8. The display device of claim 1, wherein the gate wiring is a part of one of a driving signal wiring, a power application wiring, an antistatic wiring, an inspection wiring and a repair wiring.
 9. The display device of claim 1, wherein the data wiring is a part of one of a driving signal wiring, a power application wiring, an antistatic wiring, an inspection wiring and a repair wiring.
 10. The display device of claim 1, wherein the gate wiring comprises a gate fan-out wiring connected to the gate line.
 11. The display device of claim 10, wherein the hole is positioned adjacent to the gate fan-out wiring.
 12. The display device of claim 1, wherein the data wiring comprises a data fan-out wiring connected to the data line.
 13. The display device of claim 12, wherein the hole is positioned adjacent to the data fan-out wiring. 